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low power, high speed ccd buffer amplifier ada4800 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010 analog devices, inc. all rights reserved. features integrated active load and gain of 1 buffer very low buffer power consumption as low as 20 mw on chip power save feature to reduce active load current by gpo control high buffer speed 400 mhz, ?3 db bandwidth 415 v/s slew rate fast settling time to 1%, 2 v step: 5 ns adjustable buffer bandwidth push-pull output stage adjustable active load current small package: 1.6 mm 1.6 mm 0.55 mm applications ccd image sensor output buffer digital still cameras camcorders functional block diagram 09162-001 6 isf 1 in 5 vcc i al i buff i cc 2 vee 4 idrv 3 o ut ada4800 +1 i idrv i isf figure 1. general description the ada4800 is voltage buffer integrated with an active load. the buffer is a low power, high speed, low noise, high slew rate, fast settling, fixed gain of 1 monolithic amplifier for charge- coupled device (ccd) applications. for ccd applications, the active load current source (i al ) can load the open source ccd sensor outputs and the buffer can drive the afe load. the active current load can also be switched off, to use the ada4800 as just a unity gain buffer. the buffer consumes only 20 mw of static power. in applications where power savings is critical, the ada4800 features a power save mode (see the power save mode section), which further reduces the total current consumption. the bandwidth of the ada4800 buffer is also fully adjustable through the idrv pin. the buffer of the ada4800 employs a push-pull output stage architecture, providing drive current and maximum slew capability for both rising and falling signal transitions. at a 5 ma quiescent current setting, it provides 400 mhz, ?3 db bandwidth, which makes this buffer well suited for ccd sensors from machine vision to digital still camera applications. the ada4800 is ideal for driving the input of the analog devices, inc., 12-bit and 14-bit high resolution analog front ends (afe) such as the ad9928, ad9990 , ad9920a , ad9923a, and ad997x family. the versatility of the ada4800 allows for seamless interfacing with many ccd sensors from various manufacturers. the ada4800 is designed to operate at supply voltages as low as 4 v and up to 17 v. it is available in a 1.6 mm 1.6 mm 0.55 mm, 6-lead lfcsp package and is rated to operate over the industrial temperature range of ?40 o c to +85 o c. 09162-102 6 isf 1 in 5 vcc 2 vee 4 idrv 3 out ada4800 r isf 10k ? 3v 7.5v v isf r idrv 249k? 15v 0.1f + 10f 49.9 ? 7.5v 1k? 10? 22pf i al i buff +1 i idrv i isf figure 2. typical test circuit
ada4800 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 buffer electrical characteristics ................................................. 3 active current load electrical characteristics ........................ 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ..............................................6 test circuit .........................................................................................9 theory of operation ...................................................................... 10 setting active load current with pin 6 (isf) ........................ 10 setting bandwidth with pin 4 (idrv)..................................... 10 applications information .............................................................. 11 open source ccd output buffer ............................................ 11 power save mode ....................................................................... 11 power supply bypassing ............................................................ 12 power sequencing ...................................................................... 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 7/10rev. 0 to rev. a deleted figure 15 .............................................................................. 7 changes to setting active load current with pin 6 isf section and setting bandwidth with pin 4 (idrv) section ................... 10 6/10revision 0: initial version
ada4800 rev. a | page 3 of 16 specifications buffer electrical characteristics t a = 25c, v cc = 15 v, v ee = 0 v, r idrv = 249 k connected to v idrv , r load = 1 k in parallel with 22 pf in series with 10 , v in = 7.5 v, unless otherwise noted (see figure 2 for a test circuit). table 1. parameter condition min typ max unit gain voltage gain v in = 6.5 v to 8.5 v, r isf = 0 0.995 0.998 1.005 v/v input/output characteristics i/o offset voltage 30 41 mv idrv current r idrv = 249 k, v idrv = 15 v 52 59 a input/output voltage range v ee + 1.4 v cc ? 1.4 v input bias current (i buff ) 1 a dynamic performance ?3 db bandwidth r idrv = 300 k (i cc = 1.1 ma), v out = 0.1 v p-p 182 mhz r idrv = 150 k (i cc = 2.1 ma), v out = 0.1 v p-p 288 mhz r idrv = 50 k (i cc = 4.7 ma), v out = 0.1 v p-p 400 mhz slew rate v out = 2 v step 415 v/s rise time v in = 7.5 v to 8.5 v, 10% to 90% 2.2 ns fall time v in = 8.5 v to 7.5 v, 10% to 90% 1.8 ns 1% settling time v in = 9.5 v to 7.5 v (falling edge) 5 ns v in = 7.5 v to 9.5 v (rising edge) 4.5 ns v in = 8.5 v to 7.5 v (falling edge) 4.5 ns v in = 7.5 v to 8.5 v (rising edge) 4 ns i/o delay time v in = 8.5 v to 7.5 v (falling edge) 0.4 ns v in = 7.5 v to 8.5 v (rising edge) 0.35 ns output voltage noise @ 20 mhz 1.5 nv/hz power supply supply voltage range 4 15 17 v supply current (i cc ) 1.4 1.8 ma operating temperature range ?40 +85 c active current load electrical characteristics t a = 25c, v ee = 0 v, v isf = 3 v, r isf = 10 k connected to v isf , v in = 7.5 v, unless otherwise noted (see figure 2 for a test circuit). table 2. parameter condition min typ max unit input/output characteristics active load current (i al ) v isf = 0 v 1 a v isf = 3 v 3 ma v isf = 7.5 v 12.7 ma isf current (i isf ) r isf = 10 k 111 120 a input voltage range v ee + 1.7 v cc v operating temperature range ?40 +85 c
ada4800 rev. a | page 4 of 16 absolute maximum ratings thermal resistance t a = 25c, unless otherwise noted. table 2. parameter rating supply voltage 18 v input voltage v ee to v cc isf pin v ee to v cc idrv pin v ee to v cc storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +150c ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja unit 6-lead lfcsp 160 c/w esd caution stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ada4800 rev. a | page 5 of 16 pin configuration and fu nction descriptions 09162-002 notes 1. exposed pad is not internally connected to die. connect to any low impedance node or leave floating. a da4800 epad 1 2 3 in vee out isf vcc idrv 6 5 4 figure 3. pin configuration table 4. pin function descriptions pin o. nemonic description 1 in input. connect this pin to the ccd sensor output. 2 vee negative power supply voltage. 3 out output. connect this pin to the afe input. 4 idrv bandwidth adjustment pin. connect this pin to vcc or an external voltage with an external resistor. this pin allows bandwidth to be controlled by adjusting i cc . this pin can also be used to power down the buffer. 5 vcc positive power supply voltage. 6 isf active load current adjustment pin. connect to vcc or an external voltage with an external resistor. this pin can also be connected to the microcontroller logic output throug h an external resistor for power save mode. this pin can also be used to power down the active current load. epad epad exposed pad. not internally connected to die. connect to any low impedance node or leave floating.
ada4800 rev. a | page 6 of 16 typical performance characteristics t a = 25c, v cc = 7.5 v, v ee = ?7.5 v, r idrv = 249 k connected to v idrv , v isf = ?4.5 v, r isf = 10 k connected to v isf , v in shunt terminated with 49.9 to 0 v, r load = 1 k in parallel with 22 pf in series with 10 to 0 v. 1 ?9 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 0 1m 10m 100m 1g gain (db) frequency (hz) r idrv = 300k ? r idrv = 200k ? r idrv = 150k ? r idrv = 50k ? v out = 100mv p-p 09162-003 figure 4. small signal frequency response with various idrv resistances 3 ?15 ?12 ?9 ?6 ?3 0 1m 10m 100m 1g gain (db) frequency (hz) t a = ?40c v out = 100mv p-p 09162-004 t a = +25c t a = +85c figure 5. small signal frequency response at various temperatures 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 1.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 0369 258 147 % settling error v out (v) time (ns) v in ? v out v out 09162-005 figure 6. settling time, 1 v to 0 v output transition 3 0 ?30 ?27 ?24 ?21 ?18 ?15 ?12 ?9 ?6 ?3 1m 10m 100m 1g gain (db) frequency (hz) r idrv = 300k ? r idrv = 200k ? r idrv = 150k ? r idrv = 50k ? v out = 2v p-p 09162-006 figure 7. large signal frequency resp onse with various idrv resistances 1.5 ?1.5 2.4 0 ?1.0 0.4 ?0.5 0.8 01 0.5 1.6 1.0 2.0 036 1 0 9 258 147 % settling error v out (v) time (ns) . 2 v in ? v out v out 09162-007 figure 8. settling time, 2 v to 0 v output transition 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 1.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 0369 258 147 % settling error v out (v) time (ns) v in ? v out v out 09162-008 figure 9. settling time, 0 v to 1 v output transition
ada4800 rev. a | page 7 of 16 800 200 300 400 500 600 700 11 16 15 14 13 12 input to output delay time (ps) supply voltage (v) 0v to 0.5v pulse 0.5v to 0v pulse 0v to 1v pulse 1v to 0v pulse 09162-009 figure 10. input to output delay time vs. supply voltage 1.2 ?0.2 0 0.2 0.4 0.6 0.8 1.0 01 0 8 6 4 29 7 5 3 1 pulse response (v) time (ns) output input 09162-010 figure 11. positive pulse response, 0 v to 1 v 2.5 2.0 1.5 1.0 0.5 ?0.5 0 01 4 12 10 8642 pulse response (v) time (ns) output input 09162-011 figure 12. positive pulse response, 0 v to 2 v 1.2 1.0 0.8 0.6 0.4 0.2 ?0.2 0 01 987654321 pulse response (v) time (ns) 0 output input 09162-013 figure 13. negative pulse response, 1 v to 0 v 2.5 2.0 1.5 1.0 0.5 ?0.5 0 13 27 25 23 21 19 17 15 pulse response (v) time (ns) output input 09162-014 figure 14. negative pulse response, 2 v to 0 v 30 25 20 15 10 5 0 ?7.5 ?5.5 ?3.5 ?1.5 0.5 2.5 4.5 6.5 active load current, i al (ma) v isf (v) r isf = 10k ? 09162-018 figure 15. input current vs. voltage on isf pin (v isf )
ada4800 rev. a | page 8 of 16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 ?40 80706050 40 302010 0 ?10?20 ?30 current (ma) temperature (c) i isf i idrv 09162-019 figure 16. isf and idrv currents vs. temperature 0 ?5 ?10 ?15 ?20 ?25 ?30 ?35 ?40 ?40 ?15 10 35 60 85 v os (mv) temperature (c) 09162-020 figure 17. v os vs. temperature 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ?7.5 ?5.5 ?3.5 ?1.5 0.5 2.5 4.5 6.5 i cc (ma) v idrv (v) 09162-021 figure 18. i cc vs. voltage on idrv pin (v idrv ) 700 ?700 ?600 ?500 ?400 ?300 ?200 ?100 0 100 200 300 400 500 600 02468101214 v os (mv) v in (v) 09162-022 figure 19. output offset voltage vs. input voltage
ada4800 rev. a | page 9 of 16 test circuit ada4800 i al i buff +1 i drv i sf 6 isf 1 in 5 vcc 2 vee 4 idrv 3 out r isf 10k ? 3v v isf 0.11ma r idrv 249k ? 15v 0.05ma 7.5v 49.9 ? 2.96ma 7.5v 4.68ma 1.41ma 09162-026 0.1f 10f + 1k? 10 ? 22pf figure 20. typical current flow
ada4800 rev. a | page 10 of 16 theory of operation the ada4800 is a buffer integrated with an active load. each element (the active load and the buffer) operates independently, as described in the following sections. figure 22 illustrates an ada4800 application configuration for using this power save feature. an external resistor connected between the isf and the microcontroller gpo pin determines the amount of current that flows into the input pin. this current can be calculated by using equation 1 and equation 2. setting active load current with pin 6 (isf) the isf pin is used to establish the value of the active current load (i al ). set the isf current using equation 1. k 3 v55.1 + ? = isf isf isf r v i (1) setting bandwidth with pin 4 (idrv) the idrv pin establishes the buffers i cc quiescent current. as i cc is increased, power dissipation and bandwidth both increase. set the current using equation 3. where: v isf is referenced to pin 2. v isf can be an external voltage source, v cc , or a gpo output as explained in the following paragraphs. r isf is the external resistor between the isf pin and v isf . k 28 v8.0 + ? = idrv idrv idrv r v i (3) where: v idrv is referenced to pin 2. v idrv can be an external voltage source or v cc . r idrv is the external resistor between the idrv pin and v idrv . the active load current (into the in pin) is directly proportional to i isf and can be calculated by equation 2. i al = i isf 27 (2) the ada4800 allows for additional power savings by reducing the active load current. the active load current can be logically controlled by connecting the isf pin to any general-purpose output (gpo) pin of a system microcontroller through an external resistor. a gpo logic high enables the flow of the active load current. appling Cv s or connecting a high-z to the isf pin places the ada4800 into power save mode by shutting down the active load current. the i cc current is directly proportional to i idrv and can be calculated by equation 4. i cc = i idrv 26 (4) applying Cv s to the idrv pin shuts down the buffer.
ada4800 rev. a | page 11 of 16 applications information open source ccd output buffer with low power, high slew rate, and fast settling time, the ada4800 is the ideal solution for an output buffer for ccd sensors with an open source output configuration. figure 21 shows a typical application circuit for the ada4800 as a ccd sensor output buffer. the output of the ccd is connected directly to the in pin of the ada4800, whose out pin is then ac-coupled into the input of the analog front end. in vee out ccd afe 09162-027 15v ada4800 i al i buff +1 i idrv i isf 6 isf 1 5 vcc 2 4 idrv 3 r isf 120k ? 15v v isf r idrv 249k ? 0.1f 0.1f 0.1f 47f + figure 21. typical application block diagram to help reduce the effects of power supply noise coupling into the isf and idrv pins, use 0.1 f ceramic bypass decoupling capacitors. for best performance, place these capacitors as close to each of these pins as is physically possible. power save mode the buffer of the ada4800 consumes only 20 mw of static power. to achieve even more power savings, the ada4800 active load current can be switched off during standby mode or reduced during monitoring mode. figure 22 illustrates the ada4800 as an open source ccd buffer configured for using this power save feature. power save mode allows i al current to be logically controlled by connecting the isf pin to any general- purpose output (gpo) pin of the system microcontroller through an external resistor. a gpo logic high enables the flow of input sink current, while a logic low disables the input sink current and asserts the power save mode. 0v to 3v gpo pin in vee out ccd afe 09162-028 15v ada4800 i al i buff +1 i idrv i isf 6 isf 1 5 vcc 2 4 idrv 3 r isf 10k? v isf r idrv 249k ? 0.1f 0.1f 0.1f 47f + figure 22. using gpo to drive isf voltage figure 23 shows an example of the ada4800 power save feature. afe gpo1 gpo2 20k? 20k? main board fpc ada4800 isf 09162-029 figure 23. example block diagram for sink current selection three combinations of i al are provided with figure 23 . selection of the i al is controlled by the logic signals applied to the gpo1 and gpo2 pins. table 5 summarizes the i al selections. table 5. input sink current selection mode gpo1 gpo2 resistance (k) active load current, i al (ma) standby high-z high-z high-z 0 0 0 n/a sleep high-z 1 20 1.90 1 high-z 20 active 1 1 10 3.36
ada4800 rev. a | page 12 of 16 power supply bypassing attention must be paid to bypassing the power supply pin of the ada4800. use high quality capacitors with low equivalent series resistance (esr), such as multilayer ceramic capacitors (mlccs), to minimize supply voltage ripple and power dissipa- tion. a large, usually tantalum, 2.2 f to 47 f capacitor located in close proximity to the ada4800 is required to provide good decoupling for lower frequency signals. the actual value is determined by the circuit transient and frequency requirements. in addition, 0.1 f mlcc decoupling capacitors should be located as close to the power supply pin as is physically possible, no more than ? inch away. the ground returns should terminate imme- diately into the ground plane. locating the bypass capacitor return close to the load return minimizes ground loops and improves performance. power sequencing all i/o pins are esd protected with internal back-to-back diodes connected to vcc and gnd as shown in figure 24 . with the ada4800 supply turned off (v cc = 0 v), a voltage on an i/o pin can turn on the protection diodes and cause permanent damage or destroy the ic. to prevent this condition during power-on, no voltages should be applied to any i/o pins until vcc is fully on and settled. during power-off, i/o pin voltages should be removed or reduced to 0 v before vcc is turned off. ada4800 v c c external pin 09162-030 figure 24. simplified input/output circuitry in the presence of a voltage on an i/o pin with v cc = 0 v, the current should be limited to 5 ma or less by the source or by adding a series resistor.
ada4800 rev. a | page 13 of 16 outline dimensions 1.15 1.05 0.95 0.375 0.300 0.225 101409-a top view 6 1 4 3 0.30 0.25 0.20 bottom view pin 1 index area seating plane 0.60 0.55 0.50 0.60 0.50 0.40 0.152 ref 0.05 max 0.02 nom 1.65 1.60 sq 1.55 0.50 bsc exposed pad p i n 1 i n d i c a t o r ( r 0 . 1 5 ) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 25. 6-lead lead frame chip scale package [lfcsp_ud] 1.60 mm 1.60 mm body, ultra thin, dual lead (cp-6-4) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ADA4800ACPZ-R2 ?40c to +85c 6-lead lead frame chip scale package [lfcsp_ud] cp-6-4 h2e ada4800acpz-r7 ?40c to +85c 6-lead lead frame chip scale package [lfcsp_ud] cp-6-4 h2e ada4800acpz-rl ?40c to +85c 6-lead lead frame chip scale package [lfcsp_ud] cp-6-4 h2e 1 z = rohs compliant part.
ada4800 rev. a | page 14 of 16 notes
ada4800 rev. a | page 15 of 16 notes
ada4800 rev. a | page 16 of 16 notes ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d09162-0-7/10(a)

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